3D-IC integration realized by using through-silicon via (TSV) technology is the main trend in packaging industry. TSVs are usually fully filled by electroplated Cu, namely TSV-Cu, which can make products possess higher electrical performance, higher density and lighter weight. In a typical TSV forming process, the TSV-Cu is annealed to stabilize its microstructure. However, during annealing process, the Cu protrudes out of the TSV due to the large change in temperature and the mismatch of coefficient of thermal expansion between the Cu (16.7×10^-6 ℃^-1) and its surrounding Si (2.3×10^-6 ℃^-1) matrix. This protrusion is a potential threat to the TSV structural integrity, since it might lead to cracking or delamination. In this research, the effects of annealing process on microstructure evolution and protrusion of TSV-Cu are investigated. Four level sets of current density and additive concentration were used to fill Cu into the TSV by electroplating process to prepare test specimens. The TSV diameter was 30 μm, and depth was 100 μm. The pitch of two TSVs was 200 μm. The annealing process was conducted in a vacuum annealing furnace, the specimens were heated from 25 ℃ to 425 ℃, and then maintained for 30 min at 425 ℃. The microstructures of TSV-Cu before and after annealing were characterized by EBSD. The protrusion of specimens after annealing was measured by White Light Interferometer (WLI). The results show that, during the electroplating process, both current density and additive concentration have impact on the TSV-Cu grain size, higher current density and higher additive concentration help to gain a finer grained Cu, and the influence of the additive concentration is less significant than the current density. After being annealed, for all the specimens, the Cu grain size increases, the TSV-Cu protrudes with a crack along the Cu-Si interface within the Cu seed layer, and there is a positive correlation between the protrusion and the grain size of the TSV-Cu.